DYNAMIC DATA TRANSFER CONTROL METHOD AND APPARATUS FOR SHARED SMP COMPUTER SYSTEMS

Patent №

US 7,574,548

Granted

2009-08-11

Filed 2007

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11853881

As a performance critical (high or full speed) request for a computer system data bus travels down a central pipeline, the system detects whether the interface data bus is currently empty or there is an ongoing half-speed transfer. If there is an ongoing low speed transfer, the system dynamically time shift or slows down the read rate out of the interleave buffer to half speed, and utilizes the free half of the bandwidth. This dynamic “zippering” or time shifting of data prevents a pipe pass from being rejected because the whole data bus is unavailable.

AI hardwareG06F 13/4059G06F 12/0859

AI classification

AI hardware0.96
Knowledge representation0.04
Natural language0.02
Speech0.00
Machine learning0.00
Vision0.00
Evolutionary computation0.00
Planning0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 198130879

Assignors

DRAPALA, GARRETT M., DUNN, DEANNA P., FEE, MICHAEL

On an employer assignment, the assignors are typically the inventors.

From the same owner

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