DEBUG NETWORK FOR A CONFIGURABLE IC

Patent №

US 7,728,617

Granted

2010-06-01

Filed 2008

Owner

Lab

AI components

1

hardware

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

12235581

Some embodiments of the invention provide a configurable integrated circuit (IC) that includes several configurable circuits grouped in several tiles. The configurable IC also includes a configuration network for loading configuration data into the IC, where the configuration data is for configuring several of the configurable circuit. In some embodiments, the configuration network includes several registers at several boundaries between the tiles, where the registers allow multiple configuration data sets to be routed to multiple tiles concurrently. The configuration network in some embodiments includes several address counters at several tiles, where each address counter allows one address to be loaded for a tile and then to be successively incremented based on increment instructions sent over the configuration network. At least, two different addresses specified by an address counter of a particular tile identify two different resources within the particular tile.

AI hardwareH03K 19/1731H03K 19/177H03K 19/17704H03K 19/17736H03K 19/17748H03K 19/17756H03K 19/17764

AI classification

AI hardware0.92
Knowledge representation0.14
Natural language0.00
Vision0.00
Evolutionary computation0.00
Machine learning0.00
Speech0.00
Planning0.00
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