PROCESSING AN INDIRECT BRANCH INSTRUCTION IN A SIMD ARCHITECTURE

Patent №

US 7,761,697

Granted

2010-07-20

Filed 2006

Owner

NVIDIA CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11557082

One embodiment of a computing system configured to manage divergent threads in a thread group includes a stack configured to store at least one token and a multithreaded processing unit. The multithreaded processing unit is configured to perform the steps of fetching a program instruction, determining that the program instruction is an indirect branch instruction, and processing the indirect branch instruction as a sequence of two-way branches to execute an indirect branch instruction with multiple branch addresses. Indirect branch instructions may be used to allow greater flexibility since the branch address or multiple branch addresses do not need to be determined at compile time.

AI hardwareG06F 9/30072G06F 9/30061G06F 9/3009G06F 9/30185G06F 9/323G06F 9/3851G06F 9/3887G06F 9/3888+1 more

AI classification

AI hardware0.97
Natural language0.02
Knowledge representation0.00
Machine learning0.00
Speech0.00
Evolutionary computation0.00
Vision0.00
Planning0.00

Ownership

NVIDIA CORPORATION

assignment · 184870041

Assignors

COON, BRETT W., LINDHOLM, JOHN ERIK, MILLS, PETER C., NICKOLLS, JOHN R.

On an employer assignment, the assignors are typically the inventors.

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