SYSTEM AND METHOD FOR PROVIDING A HIGH-SPEED MESSAGE PASSING INTERFACE FOR BARRIER OPERATIONS IN A MULTI-TIERED FULL-GRAPH INTERCONNECT ARCHITECTURE
Patent №
US 7,809,970
Granted
2010-10-05
Filed 2007
Owner
INTERNATIONAL BUSINESS MACHINES CORPORATION
Lab
AI components
2
planning · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11845225
A method, computer program product, and system are provided performing a Message Passing Interface (MPI) job. A first processor chip receives a set of arrival signals from a set of processor chips executing tasks of the MPI job in the data processing system. The arrival signals identify when a processor chip executes a synchronization operation for synchronizing the tasks for the MPI job. Responsive to receiving the set of arrival signals from the set of processor chips, the first processor chip identifies a fastest processor chip of the set of processor chips whose arrival signal arrived first. An operation of the fastest processor chip is modified based on the identification of the fastest processor chip. The set of processor chips comprises processor chips that are in one of a same processor book or a different processor book of the data processing system.
AI classification
Ownership
INTERNATIONAL BUSINESS MACHINES CORPORATION
assignment · 197910845
Assignors
ARIMILLI, LAKSHMINARAYANA B, ARIMILLI, RAVI K, RAJAMONY, RAMAKRISHNAN
On an employer assignment, the assignors are typically the inventors.