METHOD FOR VERIFYING CONNECTIVITY OF ELECTRICAL CIRCUIT COMPONENTS

Patent №

US 7,979,262

Granted

2011-07-12

Filed 2006

Owner

CADENCE DESIGN SYSTEMS, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11372292

Connections between digital blocks and other circuit components, such as power supplies and clocks, are verified using a discrete property or object, such as a discrete discipline. A discrete discipline is defined for each value of an operating parameter, such as voltage or clock speed, that is used in a circuit design. Each discrete discipline is propagated throughout respective nets using bottom-up and/or top-down propagation. As a result, each digital net is associated with a power supply value through its corresponding discrete discipline. A determination is made whether two digital nets are connected to each other within the same digital island. If so, a determination is made whether the digital nets are compatible. If they have conflicting discrete disciplines, then they are not compatible and an error report or signal can be generated to identify the incompatibility and its location. Compatibility checks can disregard grounded digital nets. Verifications can be performed for both digital and mixed signal digital/analog designs without running simulations.

AI hardwareG06F 30/33G06F 30/20G06F 2119/06

AI classification

AI hardware0.88
Knowledge representation0.08
Natural language0.01
Vision0.01
Evolutionary computation0.00
Machine learning0.00
Speech0.00
Planning0.00

Ownership

CADENCE DESIGN SYSTEMS, INC.

assignment · 176740558

Assignors

IYENGAR, SRINIVASAN, KOLPEKWAR, ABHIJEET, CHETPUT, CHANDRASHEKAR

On an employer assignment, the assignors are typically the inventors.

From the same owner

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