MULTI-SOURCE DUAL-PORT LINKED LIST PURGER

Disclosed is a circuit for simultaneously searching two ends of a vector. The circuit comprises at least one input for receiving a vector of head pointers. A first input of a memory latch receives the vector of head pointers. An input of a first priority decoder receives the vector of head pointers from the memory latch. The first priority decoder traverses the vector of head pointers from a first end of the vector for identifying one active bit in the vector. An input of a first reverse module also receives the vector of head pointers from the memory latch. An input of second priority decoder receives the vector of head pointers (in reverse order) from the first reverse module. The second priority decoder traverses the vector received from the first reverse module from a first end of the reversed vector for identifying one active bit in the vector.