Patent №
US 8,095,747
Granted
2012-01-10
Filed 2008
Owner
CYPRESS SEMICONDUCTOR CORPORATION
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12239532
In an embodiment, an apparatus includes a memory controller configured to control first and second memory components. A point-to-point data bus configured to pass data between the memory controller and the memory components may include a direct connection from each memory component to the memory controller. A daisy chained address bus configured to pass commands between the memory controller and the memory components may include a direct connection from the first memory component to the memory controller and a daisy chain connection from the first memory component to the second memory component.
AI classification
Ownership
CYPRESS SEMICONDUCTOR CORPORATION
assignment · 216020877
Assignors
BARBARA, BRUCE, LI, GABRIEL, TRAN, THINH, TZOU, JOSEPH
On an employer assignment, the assignors are typically the inventors.