Patent №
US 8,305,793
Granted
2012-11-06
Filed 2008
Owner
QIMONDA AG
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12122091
An integrated circuit includes an array of resistance changing memory cells, and a circuit configured to apply an initialization signal to a first one of the memory cells that is in a virgin resistance state. The initialization signal is configured to modify the first memory cell without switching an operation state of the first memory cell.
AI hardwareG11C 7/20G11C 13/0007G11C 13/0064G11C 13/0069G11C 2013/0083G11C 2013/009G11C 2013/0092G11C 2213/31+1 more
AI classification
AI hardware0.99
Vision0.00
Knowledge representation0.00
Natural language0.00
Planning0.00
Machine learning0.00
Evolutionary computation0.00
Speech0.00
Ownership
QIMONDA AG
assignment · 209590313
Assignors
MAJEWSKI, PETRA, PHILIPP, JAN BORIS
On an employer assignment, the assignors are typically the inventors.
From the same owner
Resistive Memory Devices with Improved Resistive Changing ElementsUS 8,742,387 · 2014ELECTRICAL CIRCUIT WITH A NANOSTRUCTURE AND METHOD FOR PRODUCING A CONTACT CONNECTION OF A NANOSTRUCTUREUS 8,664,657 · 2014Memory scheduler for managing maintenance operations in a resistive memory in response to a trigger conditionUS 8,595,449 · 2013SYSTEM AND METHOD FOR ESTABLISHING DATA CONNECTIONS BETWEEN ELECTRONIC DEVICESUS 8,543,831 · 2013INTEGRATED CIRCUIT WITH A RECTIFIER ELEMENTUS 8,390,453 · 2013MEMORY FOR PROVIDING A GRAPHIC CONTENTUS 8,390,633 · 2013INTEGRATED CIRCUIT WITH FLOATING-GATE ELECTRODES INCLUDING A TRANSITION METAL AND CORRESPONDING MANUFACTURING METHODUS 8,258,564 · 2012INTEGRATED CIRCUIT INCLUDING DOPED SEMICONDUCTOR LINE HAVING CONDUCTIVE CLADDINGUS 8,254,166 · 2012