GENERATING A PIPELINE OF A PACKET PROCESSOR FROM A PARSING TREE

Patent №

US 8,358,653

Granted

2013-01-22

Filed 2010

Owner

XILINX, INC.

Lab

AI components

3

kr · planning · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12858416

A method or system for generating a packet processor inputs a first specification describing the packet processor, generates a parsing tree and generates a second specification describing a programmable compute pipeline. The parsing tree is generated from the actions of the first specification. The parsing tree has multiple levels and each level specifies one or more concurrent sets of elementary operations. The parsing tree also specifies for each level a respective bound on the elementary operations in the concurrent sets of the level. The programmable compute pipeline includes multiple stages for implementing the actions. Each stage corresponds to one of the levels of the parsing tree and includes one or more elementary components, with a number of the elementary components equaling or exceeding the respective bound for the level. The elementary components in the stage are programmable to concurrently perform combinations that include each concurrent set for the level.

AI classification

AI hardware1.00
Knowledge representation0.86
Planning0.55
Vision0.18
Natural language0.03
Machine learning0.00
Speech0.00
Evolutionary computation0.00

Ownership

XILINX, INC.

assignment · 248490559

Assignors

ATTIG, MICHAEL E., BREBNER, GORDON J.

On an employer assignment, the assignors are typically the inventors.

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