Patent №
US 7,784,014
Granted
2010-08-24
Filed 2007
Owner
XILINX, INC.
Lab
—
AI components
2
kr · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
11799897
A method is provided for generating a hardware description language (HDL) specification of a network packet processor from a textual language specification of the processing of network packets by the processor. The processor includes a look-ahead stage, an operation stage, an insert/remove stage, and an interleave stage. The textual language specification identifies the ports of the processor. The textual language specification includes formats for the type or types of the incoming and outgoing network packets. Each format includes the fields of the type of network packet. The textual language specification includes a procedure for each input port and for each type of incoming network packet received at the input port. Each procedure includes one or more actions for modifying the fields of a type of network packet as a function of state data and/or the fields of the type of network packet.
AI classification
Ownership
XILINX, INC.
assignment · 193670001
Assignors
BREBNER, GORDON J., NEELY, CHRISTOPHER E., JAMES-ROXBY, PHILIP B., KELLER, ERIC R., KULKARNI, CHIDAMBER R., BAXTER, MICHAEL A., STYLES, HENRY E., SCHELLE, GRAHAM F.
On an employer assignment, the assignors are typically the inventors.