METHOD FOR GENERATING AN INTEGRATED AND UNIFIED VIEW OF IP-CORES FOR HIERARCHICAL ANALYSIS OF A SYSTEM ON CHIP (SOC) DESIGN
Patent №
US 8,533,647
Granted
2013-09-10
Filed 2012
Owner
ATRENTA, INC.
Lab
—
AI components
4
ml · kr · planning · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
13645897
In order to realize some of the advantages described above, there is provided a computer-implemented method for verification of an intellectual property (IP) core in a system-on-chip (SoC). The method comprises generating a plurality of verification specific abstracted views of the IP core each of the plurality of verification specific abstracted views having a plurality of verification specific attributes at an input/output (I/O) interface of each of the abstracted view of the IP-core. A unified abstracted view of the IP-core is generated.
AI classification
Ownership
ATRENTA, INC.
assignment · 290840117
Assignors
GANGADHARAN, SRIDHAR, MOVAHED-EZAZI, MOHAMMAD H., SARWARY, SHAKER, MAAMARI, FADI, RAY, SUBIR SUBIR
On an employer assignment, the assignors are typically the inventors.