SYSTEM AND METHOD FOR ASSERTION PUBLICATION AND RE-USE

A system and method for managing analog assertion publication and re-use for analog and mixed-signal circuit designs. A graphical user interface based environment allows circuit designers to create, verify, formalize, and publish an analog assertion for a circuit design for subsequent re-use with another circuit design. Embodiments enable analog assertion handling while simultaneously depicting a circuit design in a schematic and/or layout editor window. Embodiments capture referenced circuit objects and parameterize the assertion for numerical values and connectivity. A designer may publish the assertion and annotate it with descriptive metadata, possibly with other assertions of related functionality, to a library accessible by users of analog design and verification tools. Another designer may re-use the assertion by searching for and selecting a relevant published assertion, instantiating and binding the selected assertion to specific elements of a second circuit design, and verify the assertion for the second circuit design.