CONFLICT-FREE REGISTER ALLOCATION USING A MULTI-BANK REGISTER FILE WITH INPUT OPERAND ALIGNMENT
Patent №
US 8,555,035
Granted
2013-10-08
Filed 2010
Owner
NVIDIA CORPORATION
Lab
AI components
2
vision · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
12831953
One embodiment of the present invention sets forth a technique for using a multi-bank register file that reduces the size of or eliminates a switch and/or staging registers that are used to gather input operands for instructions. Each function unit input may be directly connected to one bank of the multi-bank register file with neither a switch nor a staging register. A compiler or register allocation unit ensures that the register file accesses for each instruction are conflict-free (no instruction can access the same bank more than once in the same cycle). The compiler or register allocation unit may also ensure that the register file accesses for each instruction are also aligned (each input of a function unit can only come from the bank connected to that input).
AI classification
Ownership
NVIDIA CORPORATION
assignment · 246550318
Assignors
PATNEY, ANJUL, DALLY, WILLIAM J.
On an employer assignment, the assignors are typically the inventors.