HARD MEMORY ARRAY FAILURE RECOVERY UTILIZING LOCKING STRUCTURE

Patent №

US 8,560,897

Granted

2013-10-15

Filed 2010

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12961947

A technique for managing hard failures in a memory system employing a locking is disclosed. An error count is maintained for units of memory within the memory system. When the error count indicates a hard failure, the unit of memory is locked out from further use. An arbitrary set of error counters are assigned to record errors resulting from access to the units of memory. Embodiments of the present invention advantageously enable a system to continue reliable operation even after one or more internal hard memory failures. Other embodiments advantageously enable manufacturers to salvage partially failed devices and deploy the devices as having a lower-performance specification rather than discarding the devices, as would otherwise be indicated by conventional practice.

AI hardwareG06F 11/0727G06F 11/0724G06F 11/073G06F 11/0772

AI classification

AI hardware0.85
Planning0.35
Natural language0.01
Evolutionary computation0.00
Machine learning0.00
Knowledge representation0.00
Speech0.00
Vision0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 254620194

Assignors

COMPARAN, MIGUEL, KUPFERSCHMIDT, MARK G., SHEARER, ROBERT A.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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