TRACE ROUTING NETWORK

Patent №

US 8,566,068

Granted

2013-10-22

Filed 2012

Owner

MENTOR GRAPHICS CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13480426

Hardware emulation produces relevant and irrelevant trace data. Verification of a design under test requires knowledge of the relevant trace data. Data lines are provided to capture trace data from the hardware emulator's logic elements during emulation. The data lines connect the outputs of these logic elements to the inputs of a configurable interconnect circuit. The configurable interconnect circuit is capable of being programmed to select from a plurality of these inputs to connect a number of the data lines to a scan chain or trace data storage circuit. The configurable interconnect circuit can then selectively connect those data lines carrying relevant trace data to a trace data processing circuit. The trace data processing circuit may be a scan chain, analysis device or storage device or other suitable trace data processing device.

AI classification

AI hardware0.78
Planning0.04
Vision0.02
Machine learning0.01
Knowledge representation0.00
Speech0.00
Natural language0.00
Evolutionary computation0.00

Ownership

MENTOR GRAPHICS CORPORATION

assignment · 306280860

Assignors

QUENNESSON, CYRIL, KOUMOU, PAMPHILE

On an employer assignment, the assignors are typically the inventors.

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