DYNAMIC OPTIMIZATION FOR REMOVAL OF STRONG ATOMICITY BARRIERS

Patent №

US 8,612,950

Granted

2013-12-17

Filed 2008

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12142102

A method and apparatus for dynamic optimization of strong atomicity barriers is herein described. During runtime compilation, code including non-transactional memory accesses that are to conflict with transactional memory accesses is patched to insert transactional barriers at the conflicting non-transactional memory accesses to ensure isolation and strong atomicity. However, barriers are omitted or removed from non-transactional memory accesses that do not conflict with transactional memory accesses to reduce barrier execution overhead.

AI hardwareG06F 8/4435G06F 8/443

AI classification

AI hardware1.00
Planning0.47
Knowledge representation0.44
Speech0.00
Natural language0.00
Machine learning0.00
Evolutionary computation0.00
Vision0.00

Ownership

INTEL CORPORATION

assignment · 220970813

Assignors

SHPEISMAN, TATIANA, MENON, VIJAY, ADL-TABATABAI, ALI-REZA

On an employer assignment, the assignors are typically the inventors.

From the same owner

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