Interrupt technicques

Patent №

US 8,645,596

Granted

2014-02-04

Filed 2008

Owner

INTEL CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

12319033

Techniques are described that can be used by a message engine to notify a core or hardware thread of activity. For example, an inter-processor interrupt can be used to notify the core or hardware thread. The message engine may generate notifications in response to one or more message received from a transmitting message engine. Message engines may communicate without sharing memory space.

AI hardwareG06F 13/385H04L 49/90H04L 49/9094

AI classification

AI hardware0.69
Speech0.03
Natural language0.02
Knowledge representation0.01
Evolutionary computation0.00
Planning0.00
Vision0.00
Machine learning0.00

Ownership

INTEL CORPORATION

assignment · 265990587

Assignors

KUMAR, AMIT, KING, STEVEN, HUGGAHALLI, RAM, ZHU, XIA, MEMON, MAZHAR, BERRY, FRANK, BHARDWAJ, NITIN, WILLKE II, THEODORE

On an employer assignment, the assignors are typically the inventors.

From the same owner

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