METHOD OF PROVING FORMAL TEST BENCH FAULT DETECTION COVERAGE

Patent №

US 8,689,155

Granted

2014-04-01

Filed 2012

Owner

INFINEON TECHNOLOGIES AG

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13626249

Some aspects of the present disclosure provide for a system and method to discover which parts of a design a formal test suite can detect faults in, and thus how much of a design structure is covered by a property set. A mutatable RTL design is defined which allows for modification of a part of an RTL design from its intended behavior to a non-intended behavior, thus introducing unwanted effects. The mutatable RTL design can then be synthesized to produce a functional representation of the design. The property set can be re-run on the synthesized design to see whether the functional representation of the design is sensitive to the unwanted effect and thus whether formal verification can detect the modification.

AI hardwareG06F 30/33G06F 30/3323

AI classification

AI hardware0.99
Planning0.20
Evolutionary computation0.01
Knowledge representation0.01
Natural language0.00
Speech0.00
Vision0.00
Machine learning0.00

Ownership

INFINEON TECHNOLOGIES AG

assignment · 290200899

Assignors

GALPIN, DARREN

On an employer assignment, the assignors are typically the inventors.

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