INTEGRATED CIRCUIT DESIGN FLOW WITH LAYOUT-DEPENDENT EFFECTS

Patent №

US 8,775,993

Granted

2014-07-08

Filed 2012

Owner

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13601773

A design system for designing an integrated circuit that includes a processor, a memory coupled to the processor, and instructions to generate and edit a schematic of the integrated circuit, generate at least one recommended layout parameter of an integrated circuit device within the integrated circuit, extract the at least one recommended layout parameter during a layout stage of the integrated circuit, and calculate a circuit performance parameter of the integrated circuit using the at least one recommended layout parameter, and a user interface configured to display at least one of the circuit performance parameter and layout constraints of the integrated circuit device of the integrated circuit.

AI hardwareG06F 30/392G06F 30/398G06F 30/20

AI classification

AI hardware0.69
Planning0.07
Knowledge representation0.04
Vision0.01
Machine learning0.00
Evolutionary computation0.00
Natural language0.00
Speech0.00

Ownership

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

assignment · 292870105

Assignors

HUANG, MU-JEN, JIANG, YU-SIAN, CHEN, CHIEN-WEN

On an employer assignment, the assignors are typically the inventors.

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