Patent №
US 8,807,948
Granted
2014-08-19
Filed 2011
Owner
CADENCE DESIGN SYSTEMS, INC.
Lab
—
AI components
2
kr · planning
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
13248914
Systems and methods for real-time design checking of an integrated circuit design, include the operations of receiving at a design tool, design elements of an integrated circuit design entered by an integrated circuit designer; the design tool performing real-time design checks on the design elements as they are entered by the integrated circuit designer to determine whether a design element violates a design rule; when the design tool detects a violation of a design rule based on the design checks alerting the integrated circuit designer; and the design tool presenting a correction to correct the violation of the design rule. The real-time design checks can include, comparing each design element to one or more known non-compliant design elements stored in a database to determine whether a non-compliant design element was entered or is being entered by the integrated circuit designer.
AI classification
Ownership
CADENCE DESIGN SYSTEMS, INC.
assignment · 270070918
Assignors
LUO, WILBUR, PRIBETICH, OLIVIER, OMEDES, OLIVIER, RUEHL, ROLAND, LAI, YA-CHIEH, GENNARI, FRANK E.
On an employer assignment, the assignors are typically the inventors.