DEBUGGING USING TAGGED FLIP-FLOPS

Patent №

US 8,813,005

Granted

2014-08-19

Filed 2013

Owner

XILINX, INC.

Lab

AI components

2

planning · hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14016941

Approaches for testing a module of a circuit design include tagging flip-flops in a netlist of the module with respective path names of the flip-flops from a hardware description language specification of the module. In simulating with the netlist, event data are captured to a first file. A process determines whether or not event data in the first file matches event data in a second file of event data. In response to a difference determined between the first file and the second file, an earliest occurrence of an event in the first file having an associated signal value of a first signal that does not match an associated signal value of a corresponding event in the second file is determined. The one of the plurality of flip-flops that output the first signal is determined, and the respective path name of the one flip-flop is output.

AI classification

Planning0.81
AI hardware0.57
Evolutionary computation0.30
Knowledge representation0.00
Vision0.00
Natural language0.00
Machine learning0.00
Speech0.00

Ownership

XILINX, INC.

assignment · 311290162

Assignors

DAO, KHANG K., CORBETT, KYLE

On an employer assignment, the assignors are typically the inventors.

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