MULTI-THREADED PROCESSOR WITH DEFERRED THREAD OUTPUT CONTROL

Patent №

US 8,869,147

Granted

2014-10-21

Filed 2006

Owner

QUALCOMM INCORPORATED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11445100

A multi-threaded processor is provided that internally reorders output threads thereby avoiding the need for an external output reorder buffer. The multi-threaded processor writes its thread results back to an internal memory buffer to guarantee that thread results are outputted in the same order in which the threads are received. A thread scheduler within the multi-threaded processor manages thread ordering control to avoid the need for an external reorder buffer. A compiler for the multi-threaded processor converts instructions that would normally send processed results directly to an external reorder buffer so that the processed thread results are instead sent to the internal memory buffer of the multi-threaded processor.

AI hardwareG06F 9/4881G06F 9/30123G06F 9/3836G06F 9/3851G06F 9/3856G06F 9/3858Y02D 10/00

AI classification

AI hardware1.00
Vision0.04
Natural language0.02
Evolutionary computation0.01
Planning0.00
Knowledge representation0.00
Speech0.00
Machine learning0.00

Ownership

QUALCOMM INCORPORATED

assignment · 186320992

Assignors

DU, YUN, JIAO, GUOFANG, YU, CHUN

On an employer assignment, the assignors are typically the inventors.

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