DEFECT-FREE SIGE SOURCE/DRAIN FORMATION BY EPITAXY-FREE PROCESS

Patent №

US 8,900,980

Granted

2014-12-02

Filed 2006

Owner

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

11361249

MOSFET transistors having localized stressors for improving carrier mobility are provided. Embodiments of the invention comprise a gate electrode formed over a substrate, a carrier channel region in the substrate under the gate electrode, and source/drain regions on either side of the carrier channel region. The source/drain regions include an embedded stressor having a lattice constant different from the substrate. In a preferred embodiment, the substrate is silicon and the embedded stressor is SiGe. Implanting a portion of the source/drain regions with Ge forms the embedded stressor. Implanting carbon into the source/drain regions and annealing the substrate after implanting the carbon suppresses dislocation formation, thereby improving device performance.

PlanningH10D 30/797H01L 21/26506H01L 21/26566H01L 21/2658H10D 30/601H10D 62/822H10P 30/204H10P 30/208+4 more

AI classification

Planning0.88
Evolutionary computation0.00
AI hardware0.00
Natural language0.00
Speech0.00
Vision0.00
Knowledge representation0.00
Machine learning0.00

Ownership

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

assignment · 176220419

Assignors

WANG, CHIH-HAO, HUANG, SHIH-HSIENG, WANG, TA-WEI

On an employer assignment, the assignors are typically the inventors.

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