REPLACEMENT GATE MOSFET WITH RAISED SOURCE AND DRAIN

A disposable dielectric spacer is formed on sidewalls of a disposable material stack. Raised source/drain regions are formed on planar source/drain regions by selective epitaxy. The disposable dielectric spacer is removed to expose portions of a semiconductor layer between the disposable material stack and the source/drain regions including the raised source/drain regions. Dopant ions are implanted to form source/drain extension regions in the exposed portions of the semiconductor layer. A gate-level dielectric layer is deposited and planarized. The disposable material stack is removed and a gate stack including a gate dielectric and a gate electrode fill a cavity formed by removal of the disposable material stack. Optionally, an inner dielectric spacer may be formed on sidewalls of the gate-level dielectric layer within the cavity prior to formation of the gate stack to tailor a gate length of a field effect transistor.