Patent №
US 8,976,588
Granted
2015-03-10
Filed 2013
Owner
APLUS FLASH TECHNOLOGY, INC
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
14064222
The present invention discloses two preferred embodiments of a 12T NVSRAM cell with a flash-based Charger and a pseudo 10T NVSRAM cell with one shared Flash-based Charger. The Flash-based Charger can be made of a 2-poly floating-gate type or a 1-poly charge-trapping SONOS/MONOS flash type, regardless of PMOS type or NMOS type. In an alternative embodiment, the Store operation of above two preferred NVSRAM cell use a DRAM-like charge-sensing scheme with Flash cell configured into a voltage follower associated with Flash Charger and 2-step SRAM amplification technique to amplify the threshold level difference ΔVt stored in the paired Flash transistors. The ΔVt can be detected as low as 1V when the coupled charges through the Flash charger are sufficient by ramping a gate control of the Flash Charger as high as VPP or by increasing the channel length for the Flash Charger.
AI classification
Ownership
APLUS FLASH TECHNOLOGY, INC
assignment · 319950203
Assignors
LEE, PETER WUNG
On an employer assignment, the assignors are typically the inventors.