MEMORY WITH ELECTRICALLY ERASABLE AND PROGRAMMABLE REDUNDANCY

A semiconductor memory device is disclosed that provides replacement of defective main memory portions with operational redundant memory portions. The device includes fuse circuitry that comprises both nonvolatile and volatile memory portions. Because the fuse circuitry includes a volatile memory portion in addition to a nonvolatile memory portion, additional functionality may be achieved by the fuse circuitry. For example, the volatile portion of the fuse circuitry allows the retention of the nonvolatile portion of the circuitry to be tested using standard testing techniques. In addition, the volatile memory portion provides a way for easily utilizing unused redundant memory. In one embodiment of the present invention, a semiconductor memory device is provided that uses nvSRAM cells as the main storage element in the main memory area, the redundant memory area, and in the fuse circuitry.