DEFECT IMAGE PROCESSING APPARATUS, DEFECT IMAGE PROCESSING METHOD, SEMICONDUCTOR DEFECT CLASSIFYING APPARATUS, AND SEMICONDUCTOR DEFECT CLASSIFYING METHOD
Patent №
US 8,995,748
Granted
2015-03-31
Filed 2012
Owner
HITACHI HIGH-TECHNOLOGIES CORPORATION
Lab
—
AI components
1
vision
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
13375880
A defect image processing apparatus uses a normalized cross correlation to image-match a layout image (52) acquired from a design data with an image acquired by removing, from a defect image (53), the defect area portions thereof, and displays, as a result of that matching, a layout image and defect image (54) on the display device. In the displayed layout image & defect image (54), not only the layout image, the layer of which is the same as that of the defect image (53), but also a layout image of another layer is displayed superimposed on the defect image (53). This makes it easier to analyze the factor of a systematic defect having occurred due to a positional relationship with another layer.
AI classification
Ownership
HITACHI HIGH-TECHNOLOGIES CORPORATION
assignment · 279680795
Assignors
SAKAI, TSUNEHIRO, KURIHARA, SHIGEKI, TANDAI, YUTAKA, ISHIKAWA, TAMAO, HAMAMURA, YUICHI, FUNAKOSHI, TOMOHIRO, ISOGAI, SEIJI, ICHINOSE, KATSUHIKO
On an employer assignment, the assignors are typically the inventors.