Patent №
US 9,268,495
Granted
2016-02-23
Filed 2013
Owner
APPLE INC.
Lab
—
AI components
2
planning · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
13965109
In one embodiment, a memory system for managing priority based Input Output (I/O) command queuing for nonvolatile electrically erasable semiconductor memory comprises one or more banks of electrically erasable semiconductor memory coupled to a storage processor. The storage processor can processes access requests for the memory, and has components including: a command interface, an expectation table, and a mode selector. The command interface receives memory access requests, which include a tag to identify the request, and an external priority associated with the request. The expectation table includes a set of times associated with each of the external priority levels, which indicate the period in which a request having the external priority is expected. The mode selector selects from a set of storage processor operation modes including a standard mode and a preemption mode.
AI classification
Ownership
APPLE INC.
assignment · 309930228
Assignors
VOGAN, ANDREW W.
On an employer assignment, the assignors are typically the inventors.