VERIFICATION OF A VECTOR EXECUTION UNIT DESIGN

Patent №

US 9,268,563

Granted

2016-02-23

Filed 2012

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13674573

A method for verification of a vector execution unit design. The method includes issuing an instruction into a first instance and a second instance of a vector execution unit. The method includes issuing a random operand into a first lane of the first instance of the vector execution unit and into a second lane of the second instance of the vector execution unit. The method further includes receiving results from execution of the instruction and the random operand in both the first and the second instance of the vector execution unit and comparing the received results.

AI hardwareG06F 9/30G06F 9/3001G06F 9/30036G06F 11/16G06F 11/1629G06F 11/1641G06F 11/2226

AI classification

AI hardware0.99
Planning0.12
Natural language0.00
Evolutionary computation0.00
Machine learning0.00
Knowledge representation0.00
Vision0.00
Speech0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 292820150

Assignors

BOERSMA, MAARTEN J., KRAUTZ, UDO, SCHMIDT, ULRIKE

On an employer assignment, the assignors are typically the inventors.

From the same owner

© 2026 NYSGPT2525 LLC