TRANSACTION CHECK INSTRUCTION FOR MEMORY TRANSACTIONS

Patent №

US 9,367,264

Granted

2016-06-14

Filed 2013

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13777511

A processing unit of a data processing system having a shared memory system executes a memory transaction including a transactional store instruction that causes a processing unit of the data processing system to make a conditional update to a target memory block of the shared memory system conditioned on successful commitment of the memory transaction. The memory transaction further includes a transaction check instruction. In response to executing the transaction check instruction, the processing unit determines, prior to conclusion of the memory transaction, whether the target memory block of the shared memory system was modified after the conditional update caused by execution of the transactional store instruction. In response to determining that the target memory block has been modified, a condition register within the processing unit is set to indicate a conflict for the memory transaction.

AI hardwareG06F 3/0668G06F 9/467G06F 12/0811

AI classification

AI hardware0.74
Planning0.08
Vision0.01
Natural language0.01
Machine learning0.00
Evolutionary computation0.00
Knowledge representation0.00
Speech0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 356450610

Assignors

FREY, BRADLY G., GUTHRIE, GUY L., MAY, CATHY, WILLIAMS, DEREK E.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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