Patent №
US 9,501,411
Granted
2016-11-22
Filed 2014
Owner
INTERNATIONAL BUSINESS MACHINES CORPORATION
Lab
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
14473687
In response to a transactional store request, the higher level cache transmits, to the lower level cache, a backup copy of an unaltered target cache line in response to a target real address hitting in the higher level cache, updates the target cache line with store data to obtain an updated target cache line, and records the target real address as belonging to a transaction footprint of the memory transaction. In response to a conflicting access to the transaction footprint prior to completion of the memory transaction, the higher level cache signals failure of the memory transaction to the processor core, invalidates the updated target cache line in the higher level cache, and causes the backup copy of the target cache line in the lower level cache to be restored as a current version of the target cache line.
AI classification
Ownership
INTERNATIONAL BUSINESS MACHINES CORPORATION
assignment · 340310861
Assignors
GUTHRIE, GUY L, LE, HIEN M., STARKE, WILLIAM J., WILLIAMS, DEREK E., WILLIAMS, PHILLIP G.
On an employer assignment, the assignors are typically the inventors.