CACHE BACKING STORE FOR TRANSACTIONAL MEMORY

Patent №

US 9,501,411

Granted

2016-11-22

Filed 2014

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14473687

In response to a transactional store request, the higher level cache transmits, to the lower level cache, a backup copy of an unaltered target cache line in response to a target real address hitting in the higher level cache, updates the target cache line with store data to obtain an updated target cache line, and records the target real address as belonging to a transaction footprint of the memory transaction. In response to a conflicting access to the transaction footprint prior to completion of the memory transaction, the higher level cache signals failure of the memory transaction to the processor core, invalidates the updated target cache line in the higher level cache, and causes the backup copy of the target cache line in the lower level cache to be restored as a current version of the target cache line.

AI hardwareG06F 12/0833G06F 9/467G06F 12/0811G06F 12/0897G06F 12/12G06F 12/0815G06F 2212/283G06F 2212/62+1 more

AI classification

AI hardware0.99
Planning0.01
Evolutionary computation0.00
Machine learning0.00
Natural language0.00
Knowledge representation0.00
Vision0.00
Speech0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 340310861

Assignors

GUTHRIE, GUY L, LE, HIEN M., STARKE, WILLIAM J., WILLIAMS, DEREK E., WILLIAMS, PHILLIP G.

On an employer assignment, the assignors are typically the inventors.

From the same owner

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