Patent №
US 9,508,427
Granted
2016-11-29
Filed 2015
Owner
—
Lab
—
AI components
1
hardware
Assignment
None on record
Dataset
AIPD
2023_r1 edition
Application
14746460
Some embodiments include apparatuses and methods having first conductive lines, second conductive lines, a memory array including memory cells, each of the memory cells coupled between one of the first conductive lines and one of the second conductive lines. At least one of such apparatuses and methods can include a module configured to cause a first current from a first current source and a second current from a second current source to flow through a selected memory cell among the memory cells during an operation of storing information in the selected memory cell. Other embodiments including additional apparatuses and methods are described.