CMOS STRUCTURE ON SSOI WAFER

A method of forming fins in a complimentary-metal-oxide-semiconductor (CMOS) device that includes a p-type field effect transistor device (pFET) and an n-type field effect transistor (nFET) device and a CMOS device are described. The method includes forming a strained silicon-on-insulator (SSOI) layer in both a pFET region and an nFET region, etching the strained silicon layer, the insulator, and a portion of the bulk substrate in only the pFET region to expose the bulk substrate, epitaxially growing silicon (Si) from the bulk substrate in only the pFET region, and epitaxially growing additional semiconductor material on the Si in only the pFET region. The method also includes forming fins from the additional semiconductor material and a portion of the Si grown on the bulk substrate in the pFET region, and forming fins from the strained silicon layer and the insulator in the nFET region.