Minimizing Crossover Paths for Functional Verification of a Circuit Description

Patent №

US 9,529,948

Granted

2016-12-27

Filed 2014

Owner

SYNOPSYS, INC.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14529048

A method for functional verification of a circuit description comprises generating a first set of crossover paths based on the circuit description, generating a low power information based on a power design description associated with the circuit description, the low power information determining a set of power state combinations, and generating a second set of crossover paths based on the first set of crossover paths and the low power information, the second set of crossover paths being a subset of the first set of crossover paths. Each of the second set of crossover paths is evaluated to identify circuit description errors, in particular functional circuit description errors.

AI hardwareG06F 30/327G06F 30/30G06F 30/3312G06F 30/3315G06F 2119/06

AI classification

AI hardware0.92
Knowledge representation0.45
Planning0.00
Vision0.00
Evolutionary computation0.00
Natural language0.00
Machine learning0.00
Speech0.00

Ownership

SYNOPSYS, INC.

assignment · 347320083

Assignors

DE, KAUSHIK, NARWADE, MAHANTESH, MUKHERJEE, RAJARSHI, GUPTA, NAMIT

On an employer assignment, the assignors are typically the inventors.

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