REGISTER RETIMING AND VERIFICATION OF AN INTEGRATED CIRCUIT DESIGN

Patent №

US 9,529,947

Granted

2016-12-27

Filed 2014

Owner

ALTERA CORPORATION

Lab

AI components

1

kr

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14525948

A circuit design description may have registers and combinational gates. Circuit design computing equipment may perform register retiming on the circuit design description, whereby registers are moved across combinational gates, information about the register moves are recorded, and ultimately a modified circuit design description is created. The circuit design computing equipment may perform sequential equivalence checking to ensure that the circuit design description and the modified circuit design description are sequentially equivalent. To facilitate the sequential equivalence checking, the circuit design computing equipment may augment the two circuit design descriptions based on the information recorded during register retiming.

Knowledge representationG06F 30/3312G06F 30/23G06F 30/398G06F 30/396G06F 2119/12G06F 2119/16

AI classification

Knowledge representation0.93
Vision0.47
Planning0.11
AI hardware0.04
Evolutionary computation0.01
Machine learning0.00
Natural language0.00
Speech0.00

Ownership

ALTERA CORPORATION

assignment · 340530495

Assignors

CHIU, GORDON RAYMOND

On an employer assignment, the assignors are typically the inventors.

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