IMPLEMENTING SYSTEM IRRITATOR ACCELERATOR FPGA UNIT (AFU) RESIDING BEHIND A COHERENT ATTACHED PROCESSORS INTERFACE (CAPI) UNIT
Patent №
US 9,600,618
Granted
2017-03-21
Filed 2015
Owner
INTERNATIONAL BUSINESS MACHINES CORPORATION
Lab
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
14696787
A method and apparatus are provided for implementing system irritator accelerator field programmable gate array (FPGA) Units (AFUs) residing behind a Coherent Attached Processors Interface (CAPI) unit in a computer system. An AFU is implemented in an FPGA residing behind the CAPI unit, the AFU includes a system irritator accelerator. A processor configures the AFU and enables the AFU system irritator to execute. The AFU system irritator is replicated to create additional irritation and is re-programmable.
AI classification
Ownership
INTERNATIONAL BUSINESS MACHINES CORPORATION
assignment · 355010351
Assignors
GREENWOOD, JASON D., MCJUNKIN, STEVEN D., SCHARDT, PAUL E., TUEN, NATHANIEL K.
On an employer assignment, the assignors are typically the inventors.