METHOD AND APPARATUS FOR ASYNCHRONOUS PROCESSOR BASED ON CLOCK DELAY ADJUSTMENT

Patent №

US 9,606,801

Granted

2017-03-28

Filed 2014

Owner

HUAWEI TECHNOLOGIES CO., LTD.

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14480531

A clock-less asynchronous processing circuit or system utilizes a self-clocked generator to adjust the processing delay (latency) needed/allowed to the processing cycle in the circuit/system. The timing of the self-clocked generator is dynamically adjustable depending on various parameters. These parameters may include processing instruction, opcode information, type of processing to be performed by the circuit/system, or overall desired processing performance. The latency may also be adjusted to change processing performance, including power consumption, speed etc.

AI hardwareG06F 9/30145G06F 1/08G06F 1/10G06F 9/30036G06F 9/30189G06F 9/3826G06F 9/3828G06F 9/3836+12 more

AI classification

AI hardware1.00
Planning0.00
Vision0.00
Speech0.00
Evolutionary computation0.00
Natural language0.00
Knowledge representation0.00
Machine learning0.00

Ownership

HUAWEI TECHNOLOGIES CO., LTD.

assignment · 397390601

Assignors

TONG, WEN, GE, YIQUN, ZHANG, QIFAN, SHI, WUXIAN, HUANG, TAO

On an employer assignment, the assignors are typically the inventors.

© 2026 NYSGPT2525 LLC