MULTIPLICATION OF FIRST AND SECOND OPERANDS USING REDUNDANT REPRESENTATION

Patent №

US 9,703,531

Granted

2017-07-11

Filed 2015

Owner

ARM LIMITED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14939469

A method is provided for multiplying a first operand comprising at least two X-bit portions and a second operand comprising at least one Y-bit portion. At least two partial products are generated, each partial product comprising a product of a selected X-bit portion of the first operand and a selected Y-bit portion of the second operand. Each partial product is converted to a redundant representation in dependence on significance indicating information indicative of a significance of the partial product. In the redundant representation, the partial product is represented using a number of N-bit portions, and in a group of at least two adjacent N-bit portions, a number of overlap bits of a lower N-bit portion of the group have a same significance as some least significant bits of at least one upper N-bit portion of the group. The partial products are added while represented in the redundant representation.

AI hardwareG06F 7/5443G06F 7/50G06F 7/5324G06F 7/5336

AI classification

AI hardware0.58
Evolutionary computation0.01
Vision0.00
Natural language0.00
Knowledge representation0.00
Machine learning0.00
Speech0.00
Planning0.00

Ownership

ARM LIMITED

assignment · 371070752

Assignors

BURGESS, NEIL, LUTZ, DAVID RAYMOND, HINDS, CHRISTOPHER NEAL

On an employer assignment, the assignors are typically the inventors.

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