Patent US 4,622,650

Circuitry for generating scalar products and sums of floating point numbers with maximum accuracy and circuitry and a method for electronic computers by which scalar products of floating point numbers of the type pi, qi, ES(b,l,e1,e2) are summed with full precision in a fixed point representation by means of a summing unit (ALU) and one or more accumulator registers (ARC1, ARC2) with cells (Ai, j) for storing of codes of a base b having a length (2l+ 2 e1+ 2e2) for fixed point representation and certain overflow positions. By control means (SHR, E, Contr) the mantissas of products are delivered depending on the value of the respective exponents into the summing unit (ALU). By control means (RD, Contro), rounding operations ( .circle. , , .gradient., .increment.) demanded by the higher level computer are performed, and a rounded floating point number (.quadrature. c .epsilon. S(b,l,e1,e2)) and overflow (OF) and underflow (UF) criteria are delivered. Parallel, serial and word organized summing units (ALU) and accumulator registers (ACR) are usable and in another embodiment, the multiplication of the factors (pi, qi) is performed using a table of multiples store.