Patent №
US 9,703,900
Granted
2017-07-11
Filed 2013
Owner
XILINX, INC.
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
13944820
A system level simulation wrapper includes a plurality of port interfaces configured to provide pin accurate and bus cycle accurate communication. The system also includes a switch coupled to the plurality of port interfaces. The switch is selectively configured to communicate with a Cycle Accurate hardware description language (HDL) model of an intellectual property (IP) block or a system level model of the IP block.
AI classification
AI hardware1.00
Planning0.16
Machine learning0.02
Natural language0.00
Knowledge representation0.00
Vision0.00
Speech0.00
Evolutionary computation0.00
Ownership
XILINX, INC.
assignment · 308200344
Assignors
DHUME, NIKHIL A.
On an employer assignment, the assignors are typically the inventors.
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