VERIFICATION ENVIRONMENTS UTILZING HARDWARE DESCRIPTION LANGUAGES

The method includes identifying a register-transfer level design description for a design. The method further includes identifying one or more tests to perform on the register-transfer level design description. The method includes generating a table of commands from the one or more tests to perform on the register-transfer level design description. The method includes generating a register-transfer level design description from the table of commands for at least one of a set of components including: a test driver for the design, a monitor for the design, and a checker for the design, wherein the register-transfer level design description assigns commands in the generated table of commands to be performed by a corresponding component in the set of components. The method includes simulating the identified one or more tests utilizing the generated register-transfer level design descriptions for at least one of the test driver, the checker, and the monitor.