Patent №
US 9,811,468
Granted
2017-11-07
Filed 2015
Owner
VIA ALLIANCE SEMICONDUCTOR CO., LTD
Lab
—
AI components
1
hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
14890895
A set associative cache memory, comprising: an array of storage elements arranged as M sets by N ways; an allocation unit that allocates the storage elements in response to memory accesses that miss in the cache memory. Each memory access selects a set; for each parcel of a plurality of parcels, a parcel specifier specifies: a subset of ways of the N ways included in the parcel. The subsets of ways of parcels associated with a selected set are mutually exclusive; a replacement scheme associated with the parcel from among a plurality of predetermined replacement schemes. For each memory access, the allocation unit: selects the parcel specifier in response to the memory access; and uses the replacement scheme associated with the parcel to allocate into the subset of ways of the selected set included in the parcel.
AI classification
Ownership
VIA ALLIANCE SEMICONDUCTOR CO., LTD
assignment · 370280835
Assignors
HOOKER, RODNEY E., REED, DOUGLAS R., GREER, JOHN MICHAEL, EDDY, COLIN
On an employer assignment, the assignors are typically the inventors.