OPTIMIZING PERFORMANCE FOR CONTEXT-DEPENDENT INSTRUCTIONS

Patent №

US 9,823,929

Granted

2017-11-21

Filed 2013

Owner

QUALCOMM INCORPORATED

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

13841576

A processor includes a queue for storing instructions processed within the context of a current value of a register field, where for some embodiments the instruction is undefined or defined, depending upon the register field at time of processing. After a write instruction (an instruction that writes to the register field) executes, the queue is searched for any entries that contain instructions that depend upon the executed write instruction. Each such entry stores the value of the register field at the time the instruction in the entry was processed. If such an entry is found in the queue and its stored value of the register field does not match the value that the write instruction wrote to the register field, then the processor flushes the pipeline and restarts at a state so as to correctly execute the instruction.

AI hardwareG06F 9/30098G06F 9/30189G06F 9/3842G06F 9/3863

AI classification

AI hardware0.99
Planning0.14
Natural language0.01
Knowledge representation0.00
Vision0.00
Evolutionary computation0.00
Machine learning0.00
Speech0.00

Ownership

QUALCOMM INCORPORATED

assignment · 300840186

Assignors

STREETT, DAREN EUGENE, STEMPEL, BRIAN MICHAEL, SPEIER, THOMAS PHILIP, SMITH, RODNEY WAYNE, MCILVAINE, MICHAEL SCOTT, DOCKSER, KENNETH ALAN, DIEFFENDERFER, JAMES NORRIS

On an employer assignment, the assignors are typically the inventors.

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