METHOD AND SYSTEM FOR IMPLEMENTING A REQUIREMENTS DRIVEN CLOSED LOOP VERIFICATION COCKPIT FOR ANALOG CIRCUITS
Patent №
US 9,852,258
Granted
2017-12-26
Filed 2015
Owner
CADENCE DESIGN SYSTEMS, INC.
Lab
—
AI components
3
kr · planning · hardware
Assignment
Recorded
Dataset
AIPD
2023_r1 edition
Application
14675551
Disclosed is an approach to implement a requirements-driven analog verification flow. Disparate islands of verification tasks are performed with individual cellviews to be set into an overarching and closed loop verification flow context for a project or a complex verification task.
AI classification
AI hardware0.99
Planning0.98
Knowledge representation0.86
Evolutionary computation0.29
Machine learning0.21
Speech0.05
Natural language0.00
Vision0.00
Ownership
CADENCE DESIGN SYSTEMS, INC.
assignment · 353050106
Assignors
FOSTER, PAUL C., HARTONG, WALTER E., SUN, JINDUO
On an employer assignment, the assignors are typically the inventors.
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