Combined Analog Architecture and Functionality in a Mixed-Signal Array

Patent №

US 9,952,282

Granted

2018-04-24

Filed 2015

Owner

CYPRESS SEMICONDUCTOR CORPORATION

Lab

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

14860515

A programmable device comprises a plurality of programmable blocks, a debug interface coupled with the plurality of programmable blocks, and a power manager coupled with the plurality of programmable blocks. The power manager is configured to supply power to a subset of the plurality of programmable blocks during debugging of the subset while maintaining a different subset of the plurality of programmable blocks in a lower power mode.

AI hardwareG01R 31/3177G01R 31/31721G06F 13/28H03K 19/173Y02D 10/00

AI classification

AI hardware0.96
Evolutionary computation0.01
Vision0.00
Speech0.00
Knowledge representation0.00
Natural language0.00
Planning0.00
Machine learning0.00

Ownership

CYPRESS SEMICONDUCTOR CORPORATION

assignment · 416450780

Assignors

KUTZ, HAROLD, WILLIAMS, TIMOTHY, SULLAM, BERT, SNYDER, WARREN, SHUTT, JAMES, BYRKETT, BRUCE, MAR, MONTE, THIAGARAJAN, EASHWAR, KOHAGEN, NATHAN, WRIGHT, DAVID, HASTINGS, MARK, SEGUINE, DENNIS

On an employer assignment, the assignors are typically the inventors.

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