SCALABLE DEPENDENCY MATRIX WITH WAKE-UP COLUMNS FOR LONG LATENCY INSTRUCTIONS IN AN OUT-OF-ORDER PROCESSOR

Patent №

US 10,802,829

Granted

2020-10-13

Filed 2017

Owner

INTERNATIONAL BUSINESS MACHINES CORPORATION

AI components

1

hardware

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

15826742

Aspects of the invention include tracking dependencies between instructions in an issue queue. The tracking includes, for each instruction in the issue queue, tracking a specific dependency on each of a threshold number of instructions most recently added to the issue queue prior to the instruction, tracking as a single group a dependency of the instruction on any instructions in the issue queue that are not in the threshold number of instructions, and tracking for each source register used by the instruction an indicator of whether its content is dependent on results from an instruction in the single group that has not finished execution. Based at least in part on detecting removal from the issue queue of an instruction in the single group that has issued and not finished execution, the method includes indicating that the instruction is ready for issuance or waiting for a notification that the removed instruction has finished execution.

AI hardwareG06F 9/3838G06F 9/3851

AI classification

AI hardware0.99
Planning0.12
Knowledge representation0.02
Natural language0.00
Evolutionary computation0.00
Speech0.00
Vision0.00
Machine learning0.00

Ownership

INTERNATIONAL BUSINESS MACHINES CORPORATION

assignment · 442560618

Assignors

SILBERMAN, JOEL A., SINHAROY, BALARAM

On an employer assignment, the assignors are typically the inventors.

From the same owner

© 2026 NYSGPT2525 LLC