DESIGN RULE CHECK VIOLATION PREDICTION SYSTEMS AND METHODS

Patent №

US 10,943,049

Granted

2021-03-09

Filed 2019

Owner

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Lab

AI components

1

planning

Assignment

Recorded

Dataset

AIPD

2023_r1 edition

Application

16400664

Systems and methods are provided for predicting systematic design rule check (DRC) violations in a placement layout before routing is performed on the placement layout. A systematic DRC violation prediction system includes DRC violation prediction circuitry. The DRC violation prediction circuitry receives placement data associated with a placement layout. The DRC violation prediction circuitry inspects the placement data associated with the placement layout, and the placement data may include data associated with a plurality of regions of the placement layout, which may be inspected on a region-by-region basis. The DRC violation prediction circuitry predicts whether one or more systematic DRC violations would be present in the placement layout due to a subsequent routing of the placement layout.

PlanningG06F 30/398G06F 30/327G06F 30/392G06F 30/394G06N 20/00

AI classification

Planning0.58
Machine learning0.27
Vision0.19
Knowledge representation0.07
Evolutionary computation0.03
Natural language0.03
AI hardware0.02
Speech0.00

Ownership

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

assignment · 490600585

Assignors

CHUANG, YI-LIN, HUANG, SZU-JU, LIN, HENRY, HONG, AMOS, CHEN, YIN-AN

On an employer assignment, the assignors are typically the inventors.

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