Patent US 8,713,484

Patent №

US 8,713,484

Granted

Owner

Lab

AI components

1

planning

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

12731118

Some embodiments of the invention provide a manufacturing aware process for designing an integrated circuit (“IC”) layout. The process receives a manufacturing configuration that specifies a set of manufacturing settings for a set of machines to be used to manufacture an IC based on the IC layout. The process defines a set of design rules based on the specified manufacturing configuration. The process uses the set of design rules to design the IC layout. Some embodiments of the invention provide a design aware process for manufacturing an integrated circuit (“IC”). The process receives an IC design with an associated set of design properties. The process specifies a manufacturing configuration that specifies a set of manufacturing settings for a set of machines to be used to manufacture the IC, where the specified set of manufacturing settings are based on the set of design properties. The process manufactures the IC based on the manufacturing settings.

PlanningG06F 30/39G03F 7/70091G03F 7/70125G03F 7/70425G06F 30/398G05B 2219/35028G06F 2119/18Y02P 90/02

AI classification

Planning0.99
Evolutionary computation0.33
AI hardware0.28
Knowledge representation0.01
Natural language0.00
Machine learning0.00
Speech0.00
Vision0.00
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