ARTIFICIAL REALITY SYSTEM WITH INTER-PROCESSOR COMMUNICATION (IPC)

The disclosure describes techniques for interrupt and inter-processor communication (IPC) mechanisms that are shared among computer processors. For example, an artificial reality system includes a plurality of processors and an inter-processor communication (IPC) unit. The IPC unit includes one or more doorbell registers, wherein each doorbell register is associated with a uniquely assigned source processor and a uniquely assigned target processor. Each doorbell register is further configured to store doorbell data indicative of whether an interrupt is a high priority interrupt or a low priority interrupt. The IPC unit may also include one or more FIFO (first-in first-out) memories configured to store data associated with each interrupt.