Patent US 4,130,890

Patent №

US 4,130,890

Granted

—

Owner

—

Lab

—

AI components

hardware

Assignment

None on record

Dataset

AIPD

2023_r1 edition

Application

05804685

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This relates to a monolithic dual-dielectric cell (DDC) memory array with a DDCFET matrix. The substrate zones of these DDCFETs are inserted into a substrate body having islands for decoder logic and potential selection integrated MISFET circuits. These circuits provide potentials to bitwise write, erase or read the matrix.

AI hardwareG11C 16/14G11C 16/0466H10B 69/00

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